MCU-AS32S601
AS32S601 is a commercial space-grade radiation-hardened MCU chip based on the RISC-V architecture developed by Ansilic, featuring complete independent controllability, high security, and rich interfaces. Based on the RISC-V dual-core lockstep architecture, it supports the RV32IMAFDC instruction set with a main frequency of up to 180MHz, is designed in accordance with the ASIL-B functional safety level, and supports interfaces such as CANFD, Ethernet, PWM, ADC, ACMP, and DAC. Adopting an advanced radiation-hardened design, it can be applied in high-safety demand scenarios such as commercial space. Provide chip design, production, packaging, testing, certification, and more.
Product Details
- Based on 32-bit RISC-V instruction set, main frequency up to 180MHz
- Supports multi-IO function multiplexing (100 GPIO interfaces guaranteed)
- Built-in multiple low-speed, high-speed and dedicated DMA channels
- Built-in cache supporting ECC: 16KB Data Cache (DCache), 16KB Instruction Cache (ICache)
- Computing power: 516DMIPS
- 2MB internal PFlash supporting ECC, 512KB internal DFlash supporting ECC
- 512KB SRAM (supporting ECC)
- External QSPI-Flash driver, supporting up to 16MB external flash memory with a maximum frequency of 80MHz
- SEU : ≥75MeV.cm²/mg or times/device·day
- SEL : ≥75MeV.cm²/mg
- Asynchronous dual-core lockstep architecture
- Supports overvoltage and undervoltage protection
- Supports overcurrent and over-temperature protection
- Radiation resistance: TID≥100krad(Si); SEU≥75MeV.cm²/mg or 10^(-5) times/device.day; SEL≥75MeV.cm²/mg.
- Functional safety level: ASIL-B.
- Automotive specification certification: AEC-Q100.
典型应用
商业航天运动控制
商业航天信号系统
卫星星务计算机
星载数据采集与处理
卫星电源管理与配电
Product Manual
[Report] AS32S601 MCU single particle test .pdf
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