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Job Content

1. Responsible for software development of the company's self-developed MCU chip based on AUTOSAR CP (including BSW, MCAL, secure boot and OTA).
2. Take charge of the development, integration and version release of relevant toolchains.
3. Establish functional safety software development processes and software architectures.
4. Complete the compilation of process documents, and support functional safety certification and A-SPICE certification.
5. Cooperate with chip design engineers to optimize and improve the functions of chips for automotive applications.

Job Requirements

1. Bachelor's degree or above in Communication Engineering, Microelectronics, Electronic Engineering or other related majors.
2. More than 2 years of experience in AUTOSAR CP development, with a good command of relevant architectures and tool usage.
3. Candidates with circuit design and debugging experience will be preferred.
4. Familiar with mainstream AUTOSAR CP platforms (e.g., EB, VECTOR).
5. Familiar with functional safety standard ISO 26262.

Job Responsibilities

1. Participate in formulating specifications for new products.
2. Complete RTL coding based on specifications to implement digital functional design, conduct simulation verification, and support FPGA functional validation.
3. Define front-end verification and testing requirements, and deploy verification work to meet coverage requirements.
4. Complete digital circuit synthesis, place and route (P&R), timing analysis, and design rule checking (DRC) as well as other consistency checks.
5. Cooperate with analog engineering teams to verify relevant IPs.
6. Provide support for product testing, mass production and other related work.

Job Requirements

1. Bachelor’s degree or above in Electronic Engineering, Microelectronics, Computer Science or related majors; with at least 1 year of relevant work experience.
2. Proficiency in Verilog language and relevant EDA tools developed by Cadence/Synopsys.
3. A good command of the DFT design flow, and the ability to complete DFT design as required.
4. Familiarity with the front-end digital design flow; proficient in using EDA tools such as DC, P&R and PT; with the capability of timing analysis and optimization as well as low-power design.
5. Basic knowledge of IC digital back-end design flow, and the ability to review back-end layouts.
6. Familiarity with the SOC testing and verification process.
7. Candidates with TCL or Perl script development experience will be preferred.
8. Excellent communication skills and a strong sense of teamwork.

Job Responsibilities

1. Serve as a technical chip product project manager, and take charge of the entire process management of chip product development.
2. Formulate chip product specifications and compile product feasibility analysis reports.
3. Manage the chip product development process, and track and control key milestones of chip development (design, verification, tape-out, packaging, testing, reliability testing).
4. Organize the compilation of relevant internal standards and patent achievements.
5. Organize and manage the work of automotive-grade certification and functional safety certification for chip products.
6. Undertake key municipal-level R&D projects and compile relevant project proposals and tenders.

Job Requirements

1. Familiar with the entire chip lifecycle and the development of analog-digital hybrid circuits; prior experience in automotive-grade chip development is preferred.
2. Familiar with common MCU chips and their working principles.
3. Familiar with common interface communications, including but not limited to UART, SPI, IIC, IIS, CAN, LIN, Ethernet and other interfaces.
4. Familiar with the FPGA development process and possess the capability of MCU board-level verification via FPGA.
5. Familiar with chip verification and simulation processes, knowledgeable about relevant testing tools, and capable of planning chip testing and verification work.
6. Familiar with the chip tape-out process and knowledgeable about common process nodes and IPs.
7. Familiar with the chip packaging process, and knowledgeable about common packaging types and packaging design-related technologies.
8. Familiar with chip mass production and testing processes.
9. Familiar with automotive-grade chip certification processes and functional safety certification processes.

Job Description:

1. Familiar with Verilog language and able to understand code;

2. Responsible for the physical implementation of the digital backend from netlist to tapout;

3. Complete the overall planning of the chip, including layout, power ground network, placement of key modules, and reliability design planning;

4. Complete the overall digital backend design of the chip, including timing convergence, power consumption convergence, SI convergence, ANT convergence, reliability design, data integration, layout physical verification, and data chip interaction;

5. Assist circuit engineers in confirming relevant constraints and functions;

6. Check and convert commonly used backend library files, including lib, spice, lef, def, gds, and cdl.

Job requirements:

1. Bachelor's degree or above in microelectronics, electronic engineering or related majors;

2. More than two years of work experience in digital backend physical implementation, with successful chip production experience preferred;

3. Familiar with Synopsys/Cadence/Calibre backend design process and TimingSign off process;

4. Proficient in timing analysis, proficient in common constraints, familiar with power consumption analysis and physical verification processes;

5. Familiar with one or more commonly used processing languages such as TCL, Perl, CSH, etc;

6. Familiar with CMOS process flow, understand ESD protection and LATCHUP protection mechanism;

7. Priority will be given to those with design experience in 55nm and 110nm;

8. Good English reading and writing skills, proactive work attitude, good team spirit, meticulous, patient